1. Field of the Invention
The present invention relates generally to pipelined analog-to-digital converters.
2. Description of the Related Art
A variety of modern electronic systems (e.g., scanners, camcorders, communication modems, medical image processors and high-definition television) require high-speed signal conditioning which has been effectively provided with pipelined analog-to-digital converters whose multiple converter stages provide conversion speeds that typically exceed those of other converter structures.
An important class of pipelined analog-to-digital converters is realized with converter stages that each use a switched-capacitor structure to process a respective input data signal and generate a succeeding input data signal for a succeeding converter stage. It has been found that gain and offset errors in these switched-capacitor structures introduce nonlinearities into the pipelined converter's transfer function.
These errors have generally been addressed with calibration techniques that typically require interruption of the data signal processing and/or require the addition of specific calibration structures (e.g., an additional converter stage) with consequent degradation of converter parameters (e.g., size, power consumption and cost).